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[Software Engineering] Max+Plus-II_Quickstart_Chinese DL : 0: Max+Plus II 简易用户使用入门指南
Date : 2008-10-13 Size : 229.08kb User : whr
[Books] MPII_Quickstart_Chinese DL : 0: Max+Plus II 简易用户使用入门指南-Max Plus II Summary users Beginner's Guide
Date : 2025-07-13 Size : 228kb User : 姜力
[Embeded-SCM Develop] MaxPlus ii 的初次使用 DL : 0: MaxPlus ii 的初次使用--Use MaxPlus iii for the first time.
Date : 2025-07-13 Size : 362kb User : 李明
[Books] max+plus ii快速入门 DL : 0: maxplus2是一款应用于硬件编程的编程软件，本文件教你快速掌握其编程，仿真方法。-maxplus2 hardware is a programming application programming software, this document will teach you grasp its programming and simulation methods.
Date : 2025-07-13 Size : 336kb User : 刘晓飞
[VHDL-FPGA-Verilog] shuzizhong05 DL : 0: MAX+plus II 9.23 Baseline-MAX plus Baseline II 9.23
Date : 2025-07-13 Size : 252kb User : 冬海
[VHDL-FPGA-Verilog] DigitalClockVHDL DL : 0: 多功能电子时钟的VHDL源代码。使用MAX+PLUS II进行编译。该文档有详细的说明和程序注释。-VHDL source code. Use MAX PLUS II computer. The document is described in detail in the Notes and procedures.
Date : 2025-07-13 Size : 82kb User : wangyiran
[Other] 1_061227123744 DL : 0: max plus的入门与应用，适合初学者对max plus ii有一个感性的认识-max plus entry and applications, suitable for beginners to the max plus ii have a perceptual awareness of
Date : 2025-07-13 Size : 232kb User : da
[VHDL-FPGA-Verilog] electoniclock DL : 0: 摘　要: 数字密码锁主要完成上锁、密码输入、密码核对、开启电锁、密码修改等功能.数字密码锁的设计电路主要包括 11 个模块 ,各模块由相应的 VHDL 程序具体实现并分别进行了 MAX + PLUS II 时序仿真. 最后 ,在 MAX + PLUS Ⅱ环境下进行了整体电路的模拟仿真 ,结果表明 ,整个设计满足要求.
Date : 2025-07-13 Size : 696kb User : 孙光华
[Software Engineering] Max+Plus-II_Quickstart_Chinese DL : 0: Max+Plus II 简易用户使用入门指南-Max+ Plus II Simple User Getting Started Guide
Date : 2025-07-13 Size : 229kb User : whr
[VHDL-FPGA-Verilog] 0097 DL : 0: MAX+plus II编译的模30加法计数器，简单的与非门组成！-MAX+ Plus II compiler module adder 30 counters, a simple composition with the non-door!
Date : 2025-07-13 Size : 13kb User : LEE
[VHDL-FPGA-Verilog] Max_PlusII_ppt DL : 0: Max+Plus II 的ppt文档，看后可以很轻易上手Max+Plus -Help
Date : 2025-07-13 Size : 1.62mb User : 李晓东
[VHDL-FPGA-Verilog] WATERHOURMETERBASEDONVHDL DL : 0: 在 MAX+PLUS II开发环境下采用 VHDL语言设计并实现了电表抄表器讨论了系统的四个组成模块的设计和 VHDL 的实现每个模块采用 RTL 级描述整体的生成采用图形输入法通过波形仿真下载芯片测试完成了抄表器的功能-In the MAX+ PLUS II development environment using VHDL language design and implementation of the meter meter reading device to discuss the four components of the system module design and VHDL implementation of each module using RTL-level description of a whole generation of graphical input waveform Simulation download chip testing completed meter reading functions
Date : 2025-07-13 Size : 234kb User : linfeng
[Windows Develop] 1 DL : 0: Designing with MAX+PLUS II，可以下载下来，作为了解用-Designing with MAX+ PLUS II, can be downloaded and used as a knowledge
Date : 2025-07-13 Size : 884kb User : lz
[SCM] MAXplusIICrack DL : 0: MAX+plus II FPGA CPLD开发软件完美无限制破解版-MAX+ plus II FPGA CPLD development software cracked unlimited version of the perfect
Date : 2025-07-13 Size : 131kb User : 吴玉保
[VHDL-FPGA-Verilog] MaxplusII DL : 0: 本电子书详细地介绍了VHDL语言开发环境 Max+plus II 软件的使用方法，让新手很快学会如何使用本软件-This book describes in detail VHDL language development environment Max+ plus II software to use, so that novices will soon learn how to use the software
Date : 2025-07-13 Size : 1mb User : may
[Other] nios DL : 0: Quartus II为ALTERA公司取代大家所熟悉的最通用工具的MAX+PLUS II软件的升级版本，MAX+PLUS II在2000年已经停止更新了，而Quatrus目前已经更新到6.0版本，里面集成了很多非常有用的工具，如SOPC BUILDER等，这个工具相比其他同类EDA开发工具，和MAX+PLUS II一样仍是最好用的。MAX+PLUS II 用户可以非常方便的转入QUARTUS II工具的使用，因为用户可以选择和MAX+PLUS II一样的操作界面，况且有大量的中文说明可以帮助您更加详细的了解QUARTUS II的使用。-Quartus II for the ALTERA company will replace the familiar of the most common tools of the MAX+ PLUS II software, upgrade, MAX+ PLUS II in 2000, has stopped updating, while Quatrus now updated to version 6.0, which integrates a lot of very useful tools such as SOPC BUILDER etc., this tool compared with other similar development tools, EDA, and the MAX+ PLUS II uses the same is still the best. MAX+ PLUS II users can very easily turn to QUARTUS II the use of tools, because users can select and MAX+ PLUS II the same interface, and since a large number of Chinese explanation can help you more detailed understanding of QUARTUS II use.
Date : 2025-07-13 Size : 2.8mb User : 蒋思
[VHDL-FPGA-Verilog] fir-filter-design-using-fpga-with-MAX-Plus2 DL : 1: 基于FPGA的高阶FIR滤波器设计用max-plus　－II软件仿真-fir filter using fpga with max-plusII
Date : 2025-07-13 Size : 2.23mb User : 星空心晴之夏
[Other] MaxPPlus-II DL : 0: maxplusII教程 Max+Plus II 简易用户使用入门指南-maxplusII teaching material Simple user use portal guide
Date : 2025-07-13 Size : 228kb User : sherry
[VHDL-FPGA-Verilog] MAXPPLUS-II DL : 0: 这是一个有关使用MAX+PLUS II原理图输入设计方法进行FPGA设计的教程，便于快速入门。-This is about using the MAX+ PLUS II schematic design methodology for FPGA design tutorials, easy Quick Start.
Date : 2025-07-13 Size : 781kb User : 王红卫
[VHDL-FPGA-Verilog] MAXPplus-II DL : 0: MAX+plus II的安装以及破解方法，和大家共享一下，有需要的拿去参考一下。-Installation as well as crack MAX+plus II, and share, there is a need to take a look.
Date : 2025-07-13 Size : 23kb User : 陈玉宝

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